The disclosure of this application relates generally to scan chains, and more particularly, to a performance screen ring oscillator (PSRO) formed from multi-dimensional pairings of scan chains.
As the size of integrated circuits decrease, across chip variation (ACV) is becoming an increasing concern. A transistor on one side of an integrated circuit will not always operate similar to a transistor on another side of the integrated circuit. Margins are provided in order to ensure that the integrated circuit operates as desired, however, this can lead to reduced performance and increased power requirements.
It is helpful to understand how an integrated circuit will behave, in order to minimize these margins. Performance screen ring oscillators (PSROs) can be used to monitor and predict performance in areas of an integrated circuit. A PSRO is usually used in close proximity to the area that is being monitored. Typically, a large number of PSROs are needed in order to monitor many areas of an integrated circuit. However, current PSROs can take up significant space and wiring, which may make them less appealing for use in monitoring and predicting performance of areas in an integrated circuit.